Software-defined GPS receiver: the breadboard
BeagleBone Black + LX25 FPGA + SE4150 FE
A few small updates to the distribution. There is a much improved Makefile that compiles files incrementally so everything is not recompiled each time a change is made. There is also a new 'rsync' Makefile rule that uses rsync to selectively move files from the development machine to the target which prevents recompiling everything on the target each time. Note that the 'make install' rule is only needed on the target. For the Beagle it installs the device tree files and configures NTP.
Download the latest version at the link below.
I had a request that I publish my current source code. It's a bit of a mess but you can find it here: www.jks.com/sdgps/sdgps.tgz
I highly suggest that you look at Andrew's original code if you're looking at this stuff for the first time. His coding-style is very clean, efficient and easy to understand. Mine on the other hand is obviously the product of many iterations of debugging and trying things out.
My version does offer a translation to C code of the all Verilog so you can run the system in a simulation mode with a data file of GPS samples (available elsewhere on this site) rather than using real hardware. I also wrote a _very_ quick and dirty macro assembler for the tracking code that runs on the embedded processor. So this software distribution is pretty much self-contained. You only need to install the FFTW distribution.
Hint: For every GPS solution computed the program prints a wikimapia.org link to the lat/lon coordinates. In the Terminal app on Mac OSX at least when you put the cursor over this link and control-click you get an 'open URL' menu item. This is a very convenient way to show the solution on a satellite map to see how close it is.
Here is my breadboard version of Andrew Holme's homemade GPS receiver.
I used a BeagleBone Black (USD$55) running the preloaded Angstrom Linux. A breadboard "cape" plugs into the BBB expansion connectors to which I attached an XESS XuLA2 FPGA development board (USD$119) based on the Xilinx Spartan-6 LX25.
A one-bit wide SPI interface connects the BBB and the FPGA. The GPS front-end is built using a Skyworks SE4150 single chip solution sampling at 16.368 MHz with an IF of 4.092 MHz. Only the I-sign data is used. A 12-channel receiver configuration occupies 34% (1271/3758) of the LX25 logic slices. This includes the custom 32-bit embedded processor designed by Andrew for handling the sequential parts of the tracking loops that update at 1 KHz.
In the image below the white breadboard cape obscures the BBB underneath.
It attaches via the two black headers at top and bottom. The SPI from the FPGA is wired to the bottom header.
At the moment USB from the laptop is used to download the FPGA bitstream. Eventually the BBB will download via JTAG since it shares the SPI wiring.
Just four wires connect the GPS front-end at right: 3.3V, gnd, clock and I-data. A 3.3V active antenna is hardwired to the board.
Click image for larger.
The image below shows the running system. The laptop is strictly a display/keyboard connection to the BBB. No part of the SD-GPS software runs there. If you zoom in you'll note the SD-GPS position agrees, more or less, with the Garmin in the background.
The various status and statistics collected are:
SNR - the SNR from the initial FFT code/doppler search. > 30 needed to attempt tracking.
RSSI - the received signal strength during tracking. Also shown as #-marked graph at right.
HOLD - number of NAV bits currently detected and held. 300 needed for each subframe.
WDOG - watchdog ticks since last subframe detected. > 240 causes channel drop.
SUB - shows the detection status of each of the 5 subframes. ('p' means parity error)
FIXES - number of successful fixes computed since startup.
Click image for larger.
You haven't really lived until you've dead-bugged a 4 x 4 mm QFN package with 0.5 mm pitch pads using 40 AWG wire. It would be impossible without a good quality microscope, great tools and the ability to hold your breath while soldering a connection. I used an ordinary pad-per-hole 0.1 inch spacing breadboard that's really made for old-fashioned through-hole parts. There is a ground plane on the bottom side. In the image the TCXO is at top, the SAW filter middle-left and the SE4150 in the middle with a pool of solder on the ground paddle. Cellophane tape was used to secure the dead-bug parts so the surface tension force from soldering doesn't move them (this works surprisingly well).
So, despite the awful grounding, little 40 gauge wire inductors everywhere, no quiet local voltage regulator
and every package connection done on a wing-and-a-prayer this little breadboard of a GPS front-end chip worked the first time!
The sensitivity is not bad but signals are noisy (sats track okay, but extracting the NAV messages is marginal).
Click image for larger.
I am indebted to Andrew for publishing his homemade GPS receiver project in such detail.
I had not really understood the subtleties of GPS signal processing until now.