HP5370 Processor Replacement Project

21-Feb-2012

First PCB build. Top connectors left to right: serial, JTAG, 10/100 Ethernet, USB 2.0
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New processor card installed. Note absence of old ROM and HPIB cards. The rectangular section of the PCB holding the Ethernet and USB connectors is designed to be detached and installed at the rear panel cutout of the 5370 where the original HPIB connector is located (using appropriate extension wiring)
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Front panel displaying firmware version number on power-up/reset.
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This is what you get when connecting to the 5370 from a web browser.
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23-Jul-2011
ref: www.mail-archive.com/time-nuts@febo.com/msg39720.html

Setup using a modern microcontroller (32-bit ARM @ 48MHz) to drive the 5370's device bus. The original 5370 CPU card uses an 8-bit Motorola m6800 running @ 1.5MHz. Atmel AT91SAM7X micro evaluation-kit board on left drives the bus via ribbon cable. Cables on left edge of board connect to host development computer. Bottom right ribbon carries HPIB card signals back to logic analyzer.
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SAM7X evaluation-kit board. Top connectors: JTAG, USB, 10/100 Ethernet, serial x 2. Two 31-bit GPIO ports appear on header pins at left (connected here to ribbon). SAM7X is the 100-pin TQFP, 48-pin Ethernet PHY above. A replacement board for the 5370 would have fewer components than this board.
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Front panel measurement function timings, original instrument versus emulated firmware.

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Logic analyzer trace of binary TI data transfer to host via Ethernet connection. The green cursors measure the time to send one packet containing 512 measurements. So 512 * 164Hz = 84K meas/sec. The waveforms on the left where the 5370 device bus LA01/RW lines are madly flapping is where the count chain regs are read. The quiet portion in the center-right is the network stack running (entirely on the micro, so no 5370 bus cycles involved). "Run" is the software-controlled signal triggered on.

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Screen shot of host computer. The left window is the serial debug output from the emulator & micro. The middle is the fast C code loop that reads the count chain regs (4 writes, 6 reads) and performs the conversion from 5 to 2-bytes. On the right are the reconstructed TI values on the host (from the 10 MHz internal reference looped back to the Start input, so 100 ns +/-). Click image for larger.

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20-Feb-2011
ref: www.mail-archive.com/time-nuts@febo.com/msg36195.html

5370A running from remote firmware. This is -not- a photoshop.

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Processor board with m6800 CPU removed and parallel I/O cable attached.

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USB-to-parallel adapter at lower left. USB instrument-to-computer signal/power isolator mid left.

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